Job opening at Intel for NN IC designer

[Bhusan Gupta]

The neural network group at Intel is looking for an engineer to 
participate in the development of neural networks. 

A qualified applicant should have a M.S. or PhD in electrical 
engineering or equivalent experience. The specialization required is in
CMOS circuit design with an emphasis on digital design. Analog design
experience is considered useful as well. Familiarity with neural network 
architectures, learning algorithms, and applications is desirable. 

The duties that are specific to this job are:
	Neural network design.
		Architecture definition and circuit design.
		Chip planning, layout supervision and verification.
		Testing and debugging silicon.
	The neural network design consists primarily of digital design with
	both a gate-level and transistor-level emphasis.


The job is at the Santa Clara site and is currently open.

Interested principals can email at bgupta at aries.intel.com until the
end of August. Resumes in ascii are preferred. I will pass along all 
responses to the appropriate people.

street address:
	Bhusan Gupta
	m/s sc9-40
	2250 Mission College Blvd.
	P.O. Box 58125
	Santa Clara, Ca 95052


Intel is an equal opportunity employer, etc.

Bhusan Gupta