call for book chapters: Neural Net FPGAs

Amos Omondi amos at infoeng.flinders.edu.au
Mon Nov 25 00:41:11 EST 2002


CALL FOR BOOK CHAPTERS

FPGA Implementations of Neural Networks
(Kluwer Academic Publishers, Boston, 2003)


The development of neural networks has now reached the stage where
they are employed in a large variety of practical contexts.  However,
to date the majority of such implementations have been in
software. While it is generally recognised that hardware
implementations could, through performance (and other) advantages,
greatly increase the use of neural networks, in the past the
relatively high cost of developing ASICs has meant that only a small
number of hardware neural-computing devices has gone beyond the
research-prototype stage.

Now, however, with the appearance of large, dense, highly parallel
FPGA circuits, it has now become possible to envisage the realization
in hardware of large-scale neural networks, to get high performance at
low costs.

Nevertheless, the many opportunities offered by FPGAs also come with
many challenges.  These range from the choice of data representation,
to the implementation of specialized functions, through to the
realization of massively parallel neural networks; and accompanying
these are important secondary issues, such as benchmarking,
development tools and technology transfer.  All these issues are
currently being investigated by a large number of researchers. The
proposed book aims to capture the state of the art in these
researches.


TOPICS

Contributions, covering both original research and expository work,
are invited on the following topics, in the context of neural networks
realized in FPGAs.  (Submissions that on other closely relevant topics
are also welcome.)

Architectures (systolic arrays, SIMD, etc.)
Neurocomputers (complete systems)
Hardware accelerators
Embedded systems

Input/output
Hybrid systems
Reliability
Benchmarking and metrics

Massive parallelism
Interconnection-network topologies
Scalability
Algorithm-to-architecture mapping
Evolutionary computing

Novel hardware algorithms
Implementation of activation functions
Data-representation formats

Applications (biometrics, speech, imaging, information-retrieval, control, 
biomedical,
bioinformatics, etc.)
Development tools
Technology transfer
Case studies


SUBMISSIONS AND SCHEDULE

Submissions should be made to either of the editors, by 15 Feb 2003.
They should be in either .ps or .pdf form and must be formatted, as
book chapters, according to the publisher's style files, which will be
found at http://www.wkap.nl/authors/bookstylefiles.

Authors of accepted contributions will be expected to make final 
submissions by 1 May 2003.

Prospective authors are encouraged to indicate their intent before 
30 Dec 2002.


EDITORS

Amos Omondi
School of Informatics and Engineering
Flinders University
Bedford Park, SA 5042
AUSTRALIA

e-mail: amos at infoeng.flinders.edu.au


Jagath Rajapakse
School of Computer Engineering
Nanyang Technological University
SINGAPORE 639798

e-mail: asjagath at ntu.edu.edu





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