No subject

[Bernabe Linares B.]

                NIPS'95 WORKSHOP ANNOUNCEMENT

          Vail, Colorado. Friday, December 1st, 1995 


Title: NEURAL HARDWARE ENGINEERING: From Sensory Data Adquisition to
       High-Level Intelligent Processing



Organizers:

Bernabe Linares-Barranco and Angel Rodriguez-Vazquez  
Dept. of Analog and Mixed-Signal Circuit Design
Microelectronics National Center, Sevilla
Ed. CICA, Av. Reina Mercedes s/n, 41012 Sevilla, SPAIN
FAX: 34-5-4624506; Phone: 34-5-4239923; email: bernabe at cnm.us.es



DESCRIPTION OF THE WORKSHOP:

Developing hardware for neural applications is a task that hardware
engineers have faced during the past years using two distinct main
approaches:

(a) producing "general purpose" digital neuro-computing systems or "neural-
    -accelerators" with a certain degree of flexibility to emulate different
    neural architectures and learning rules.
(b) developing "special purpose" neuro-chips, mostly using analog or mixed
    analog/digital circuit techniques, intended to solve a specific problem
    with very high speed and efficiency.

Usually hardware of task (b) is used for the front end of a neural processing
system, such as sensory data (image/sound) adquisition  and sometimes with
some extra (pre)processing functionality (noise removal, automatic gain,
dimensionality reduction). On the other hand, hardware of task (a) is
employed for more "intelligent" or higher level processing such as learning,
clustering, recognition, abstraction, and conceptualization. However, the
limits between hardware of type (a) and (b) are not very clear, and as more
hardware is developed the overlap between the two approaches increases.

Digital technology provides larger accuracy in the realization of mathematical
operations and offers great flexibility to change learning paradigms,
learning rules, or to tune critical parameters. Analog technology, on
the other hand, provides very high area and power efficiency, but is less
accurate and flexible. It is clear that people that are developing
neural algorithms need to have some type of digital neurocomputer system
where they can change rapidly the neural architecture, the topology,
the learning rules, try different mathematical functions, and all that
with sufficient flexibility and computing power. On the other hand, when
neural systems require image or sound adquisition capabilities (retinas
or cochleas) analog technology offers very high power and chip area
efficiency, so that this approach seems to be the preferred one.
However, what happens when it comes to develop a hardware system that
needs to handle the sensory data, perform some basic processing, and
continue processing up to higher level stages where data segmentation
has to be performed, recognition on the segments has to be achieved, and
learning and abstraction should be fulfilled? Is there any clear border
among analog and digital techniques as we proceed upwards in the processing
cycle from signal acquisition to conceptualization? Is it possible to
take advantage of the synergy between analog and digital? How?
Are these conclusions the same for vision, hearing, olfactory, or intelligent
control applications?

We believe it is a good point in time to make a debate between
representatives of the two approaches, since both have evolved independently
into a large enough degree of development and maturity as to enable pros and
counters be discussed on the basis of objective, rather than subjective
considerations.



LIST OF SPEAKERS:

1. Nelson Morgan, University of California, Berkeley, U.S.A.
   "Using A Fixed-point Vector Microprocessor for Connectionist Speech
   Recognition Training"

2. Yuzo Hirai, Institute of Information Sciences and Electronics,
   University of Tsukuba, Japan.
   "PDM Digital Neural Networks"

3. Taher Daud, Jet Propulsion Laboratory, Pasadena, California, U.S.A.
   "Focal Plane Imaging Array-Integrated 3-D Neuroprocessor"

4. Ulrich Ramacher, University of Technology, Dresden, Germany.
   "The Siemens Electronic Eye Proyect"

5. Xavier Arreguit, CSEM, Neuchatel, Switzerland
   "Analog VLSI for Perceptive Systems"

6. Andreas Andreou, John Hopkins University, Baltimore, Maryland, U.S.A.
   "Silicon Retinas for Contrast Sensitivity and Polarization Sensing"

7. Marwan Jabri, University of Sydney, Australia.
   "On-Chip Learning in Analog VLSI and its Application in Biomedical
   Implant Devices"

8. Tadashi Shibata, Tohoku University, Sendai, Japan.
   "Neuron-MOS Binary-Analog Merged Hardware Computation for Intelligent 
   Information Processing"