Brain-size neurocomputers

[Jaap Murre]

The following paper has been added to our ftp site:

Heemskerk, J.N.H., & J.M.J. Murre (submitted). Brain-size neurocomputers:
   analyses and simulations of neural topologies on Fractal Architectures. 
   Submitted to the IEEE Transactions on Neural Networks.


Abstract
Current neurocomputers are more than 50 million times slower than the
brain. Although chip speeds exceed the switching speed of biological
neurons with several orders of magnitude, artificial neural networks are
of a much smaller scale than real brains. The primary aim of most
neurocomputer designs is speeding up neural paradigms rather than
implementing large-scale neural networks. In order to simulate neural
networks of brain-size, neurocomputers need to be scaled up. We here
present MindShape which is a design concept for a very large-scale
neurocomputer based on a hierarchical-modular or Fractal Architecture.
A Fractal Architecture can be built up from two types of elements:
neural processing elements (NPEs) and communication elements (CEs).
Massive usage of these elements allows for both distributed calculation
and distributed control. A detailed description of this machine is
presented, with reference to a realized feasibility study (the BSP400, see
[1][2]). Through performance analyses and simulations of data-
communication, it is shown that the Fractal Architecture supports
efficient implementation of structured neural networks. We finally
demonstrate that physical realization of brain-size neurocomputers is
feasible with current technology. 

Files can be found at:

ftp://ftp.mrc-apu.cam.ac.uk/pub/nn/murre/lsize.ps        (1589 Kb)
ftp://ftp.mrc-apu.cam.ac.uk/pub/nn/murre/lsize.ps.Z      (347 Kb)
ftp://ftp.mrc-apu.cam.ac.uk/pub/nn/murre/lsize.zip       (495 Kb)

Jan N.H. Heemskerk           hmskerk at rulfsw.leidenuniv.nl

Jacob M.J. Murre             jaap.murre at mrc-apu.cam.ac.uk

(after 1 June 1995: pn_murre at macmail.psy.uva.nl)