VLSI Phase-locking architecture NIPS 6 pre-print

[Thomas Grant Edwards]

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The file andreou.vlsi-phase-lock.ps.Z is now available for downloading
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VLSI Phase Locking Architectures for Feature Linking in
Multiple Target Tracking Systems

Andreas G. Andreou		Thomas G. Edwards
The Johns Hopkins University	University of Maryland

ABSTRACT:  Recent physiological research has shown that synchronization of
oscillatory responses in striate cortex may code for relationships between
visual features of objects.  A VLSI circuit has been designed to provide
rapid phase-locking synchronization of multiple oscillators to allow for
further exploration of this neural mechanism.  By exploiting the intrinsic
random transistor mismatch of devices operated in subthreshold, large groups
of phase-locked oscillators can be readily partitioned into smaller
phase-locked groups.  A multiple target tracker for binary images is
described utilizing this phase-locking architecture.  A VLSI chip has been
fabricated and tested to verify the architecture.  The chip employs Pulse
Amplitude Modulation (PAM) to encode the output at the periphery of the
system. 

(NIPS 6 Pre-Print)