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<p><span style="font-size:22pt;font-family:Calibri;font-weight:700;color:rgb(47,84,150)">PAISE 2019: 1</span><span style="font-size:13pt;font-family:Calibri;font-weight:700;color:rgb(47,84,150);vertical-align:8pt">st </span><span style="font-size:22pt;font-family:Calibri;font-weight:700;color:rgb(47,84,150)">Workshop on Parallel AI and
Systems for the Edge
</span></p>
<p><span style="font-size:18pt;font-family:Calibri;color:rgb(83,129,53)">Held in conjunction with </span><span style="font-size:18pt;font-family:Calibri;font-weight:700;color:rgb(83,129,53)">IPDPS</span><span style="font-size:18pt;font-family:Calibri;color:rgb(83,129,53)">, 24</span><span style="font-size:10pt;font-family:Calibri;color:rgb(83,129,53);vertical-align:7pt">th </span><span style="font-size:18pt;font-family:Calibri;color:rgb(83,129,53)">May 2019, </span><span style="font-size:18pt;font-family:Calibri;font-weight:700;font-style:italic;color:rgb(83,129,53)">Rio de Janeiro, Brazil
</span><span style="font-size:11pt;font-family:Calibri;color:rgb(0,0,128)"><a href="http://paise-conf.science">http://paise-conf.science</a> <a href="http://bit.ly/PAISE2019">http://bit.ly/PAISE2019</a>
</span></p>
<p><span style="font-size:11pt;font-family:SegoeUI">Applications involving voluminous data but needing low-latency computation and local feedback require that
the computing be performed as close to the data source as possible – often at the interface to the physical
world. Communication constraints and the need for privacy-preserving approaches also dictate the need for
computing at the edge. Given the growth in such application scenarios and the recent advances in algorithms
and techniques, machine learning and inference at the edge are unfolding and growing at a rapid pace. In
support of these applications, a wide range of hardware (CPUs, GPUs, FPGAs, ASICs) is venturing farther away
from the center, closer to the physical world. The diversity in edge-computing hardware in terms of
capabilities, architectures, and programming models poses several new challenges. The goal of this workshop
is to gather the community working in three broad areas: </span><span style="font-size:11pt;font-family:SegoeUI;font-weight:700">processing </span><span style="font-size:11pt;font-family:SegoeUI">– artificial intelligence, computer vision,
machine learning; </span><span style="font-size:11pt;font-family:SegoeUI;font-weight:700">management </span><span style="font-size:11pt;font-family:SegoeUI">– parallel and distributed programming models for resource-constrained
and domain-specific hardware, containers, remote resource management, runtime-system design, and
cybersecurity; and </span><span style="font-size:11pt;font-family:SegoeUI;font-weight:700">hardware </span><span style="font-size:11pt;font-family:SegoeUI">– systems and devices conducive to use in resource-constrained (energy, space,
etc.) applications.
</span></p>
<p><span style="font-size:11pt;font-family:SegoeUI">The workshop will provide a critically needed opportunity to discuss the current trends and issues, to share
visions, and to present solutions. The following paper categories are welcome:
</span></p>
<ul style="list-style-type:none">
<li>
<p><span style="font-size:11pt;font-family:OpenSymbol"> </span><span style="font-size:11pt;font-family:SegoeUI;font-weight:700">Full Papers</span><span style="font-size:11pt;font-family:SegoeUI">: Research papers should describe original work and be 8 or 10 pages in length.
</span></p>
</li>
<li>
<p><span style="font-size:11pt;font-family:OpenSymbol"> </span><span style="font-size:11pt;font-family:SegoeUI;font-weight:700">Short Papers: </span><span style="font-size:11pt;font-family:SegoeUI">Short research papers, 4 pages in length, should contain enough information for the
</span></p>
<p><span style="font-size:11pt;font-family:SegoeUI">program committee to understand the scope of the project & evaluate the novelty of the problem.
</span></p>
</li>
<li>
<p><span style="font-size:11pt;font-family:OpenSymbol"> </span><span style="font-size:11pt;font-family:SegoeUI;font-weight:700">Emerging Platforms and Practitioner Reports: </span><span style="font-size:11pt;font-family:SegoeUI">Short reports, 3-6 pages in length, describing novel
hardware & Software platforms, including initial proof-of-concept design & implementation.
</span></p>
<p><span style="font-size:13pt;font-family:SegoeUI;color:rgb(47,84,150)">List of Topics
</span></p>
<p><span style="font-size:12pt;font-family:SegoeUI">Edge Inference, Hardware for Edge-computing and Machine Learning, Energy Efficient Processors
for Training and Inference, Computer Vision at the Edge, Cyber Security for Edge Computing, Software
and Hardware Multitenancy at the Edge, Machine Learning Hardware, Blockchains for Edge
Computing, Programming Models for Edge Computing, Coupling HPC to Edge Applications, and
Communication and Control Strategies for Deploying and Managing Applications at the Edge.
</span></p>
<p><span style="font-size:13pt;font-family:SegoeUI;color:rgb(47,84,150)">Important Dates
</span></p>
</li>
</ul>
<ul style="list-style-type:none">
<li>
<p><span style="font-size:11pt;font-family:OpenSymbol"> </span><span style="font-size:12pt;font-family:SegoeUI;font-weight:700">Submission deadline: </span><span style="font-size:12pt;font-family:SegoeUI">February 1</span><span style="font-size:7pt;font-family:SegoeUI;vertical-align:5pt">st</span><span style="font-size:12pt;font-family:SegoeUI">, 2019
</span></p>
</li>
<li>
<p><span style="font-size:11pt;font-family:OpenSymbol"> </span><span style="font-size:12pt;font-family:SegoeUI;font-weight:700">Notification of acceptance: </span><span style="font-size:12pt;font-family:SegoeUI">March 1</span><span style="font-size:7pt;font-family:SegoeUI;vertical-align:5pt">st</span><span style="font-size:12pt;font-family:SegoeUI">, 2019
</span></p>
</li>
<li>
<p><span style="font-size:11pt;font-family:OpenSymbol"> </span><span style="font-size:12pt;font-family:SegoeUI;font-weight:700">Workshop camera-ready papers due: </span><span style="font-size:12pt;font-family:SegoeUI">March 11</span><span style="font-size:7pt;font-family:SegoeUI;vertical-align:5pt">th</span><span style="font-size:12pt;font-family:SegoeUI">, 2019 </span></p>
</li>
</ul>
</div>
</div>
</div><div><br></div>-- <br><div dir="ltr" class="gmail_signature" data-smartmail="gmail_signature"><div dir="ltr"><div style="color:rgb(0,0,0);font-family:Helvetica;font-size:12px;line-height:normal;word-wrap:break-word">–––––––––––––––––––––––––––––––</div><div style="color:rgb(0,0,0);font-family:Helvetica;font-size:12px;line-height:normal;word-wrap:break-word">Felipe M. G. França, PhD<br>Professor of Computer Science and Engineering<br>Systems Engineering and Computer Science Program, COPPE</div><div style="color:rgb(0,0,0);font-family:Helvetica;font-size:12px;line-height:normal;word-wrap:break-word">Universidade Federal do Rio de Janeiro<br>P.O. Box 68511, 21941-972, Rio de Janeiro, RJ, Brazil<br><a href="mailto:felipe@ieee.org" target="_blank">felipe@ieee.org</a><br><a href="mailto:felipe@cos.ufrj.br" target="_blank">felipe@cos.ufrj.br</a></div><div style="color:rgb(0,0,0);font-family:Helvetica;font-size:12px;line-height:normal;word-wrap:break-word"><div style="line-height:normal;word-wrap:break-word">–––––––––––––––––––––––––––––––</div></div></div></div></div>